“We’re in a pre-9/11 moment,” warned Mike Wallace, a member of the National Infrastructure Advisory Council (NIAC), at the White House on August 22.
Dover Microsystems, Inc., re-committed its membership to the non-profit RISC-V Foundation in June of 2017.
Members of Dover’s team have been involved with the foundation, which seeks to expand the reach of the open-source RISC-V computer architecture, since its inception. Dover Founder & CEO Jothy Rosenberg served as an inaugurating member of the Foundation’s Board and Dover team members have participated in many Foundation workshops, working groups, committees, and events. While Jothy is passing the torch to incoming board member Rob Oshana, he (and all of us) are excited for the future of the partnership between Dover and the RISC-V Foundation.
From the RISC-V Foundation
RISC-V (pronounced “risk-five”) is a new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry implementations under the governance of the RISC-V Foundation. The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Our intent is to provide a long-lived open ISA with significant infrastructure support, including documentation, compiler tool chains, operating system ports, reference software simulators, cycle-accurate FPGA emulators, high-performance FPGA computers, efficient ASIC implementations of various target platform designs, configurable processor generators, architecture test suites, and teaching materials. Initial versions of all of these have been developed or are under active development within the greater RISC-V ecosystem.